quadrant multiplier

quadrant multiplier 基本解释

网络  象限乘法器

计算机

重点词汇

• multipliern. 增殖者, 倍加器, 乘数 [计] 乘数; 乘法器
• quadrantn. 四分之一圆, 象限, 象限仪 [医] 四分体, 象限

quadrant multiplier 双语例句

1. 1、 A four quadrant CMOS integrated analog multiplier using active-attenuator
   采用有源衰减器的集成CMOS四象限模拟乘法器
2. 2、 A new current mode CMOS four quadrant analog multiplier consisted of two voltage controlled source coupled pairs is presented.
   提出了一种新型四象限CMOS模拟乘法器电路，其核心结构为线性化压控源耦对。
3. 3、 Design of Low Voltage Four quadrant Analogue Multiplier Using Neuron MOS Transistor
   采用神经MOS晶体管的低压四象限模拟乘法器的设计
4. 4、 The design technique for a CMOS four quadrant analog multiplier is presented, which is based on the characteristics of the MOSFET subthreshold region.
   讨论了基于MOS晶体管亚阈值区特性的CMOS四象限模拟乘法器的设计。
5. 5、 A Precision Design of CMOS Four quadrant multiplier
   CMOS四象限乘法器的精确设计
6. 6、 In this paper, a new type of reality circuit of four quadrant analogue multiplier is presented.
   本文给出一种新型四象限模拟乘法器的实现电路。
7. 7、 The simple circuit structure, high precision operation and four quadrant multiplying capability features make the multiplier widely applicable to CMOS communication ICs, signal processing equipments and electronic computing systems.
   该乘法器的电路结构简单、精确度高及实现四象限相乘的特点，使之在CMOS通信集成电路，信号处理及运算电子系统中有广阔的应用前景。
8. 8、 A new current mode CMOS four quadrant analog multiplier consisted of current conveyors and four NMOS transistors operating in triode region is presented.
   本文提出了一种新型四象限CMOS模拟乘法器，其核心组成为工作于三极管区的NMOS晶体管和高频CCII（第二代电流传输器）电路。
9. 9、 A simple low voltage BiCMOS four quadrant analog multiplier using BiCMOS linear region transconductors and pre input circuits is presented. Its basic configuration and design principle are analyzed detailedly.
   提出了一种结构简单的采用BiCMOS线性区跨导和输入预处理电路的低压BiCMOS四象限模拟乘法器，详细分析了电路的结构和设计原理。
10. 10、 Current Compensation Four Quadrant CMOS Analog Multiplier
    电流补偿型CMOS四象限模拟乘法器
11. 11、 Study of switched capacitor four-quadrant analogue multiplier
    关于开关电容四象限模拟乘法器的研究
12. 12、 An difference structure technique is proposed to eliminate nearly all the DC offset current. ( 3) Using the Class AB grounded gate multiplier as basic cell to design a high linear, four quadrant current multiplier.
    电路采用差分结构基本消除了积分器产生的直流偏移电流。（3）以ClassAB栅极接地相乘核为基本单元，设计了一款高线性度、四象限的电流乘法器。