flip-latch

flip-latch 基本解释

网络  锁存器

计算机

重点词汇

• flipvt. 掷, 弹, 轻击, 空翻 vi. 用指轻弹, 抽打, 蹦跳 n. 抛, 弹, 筋斗 a. 无礼的 [计] 翻转
• latchn. 门闩 vi. 上闩, 抓住, 占有 vt. 闩上 [计] 门闩线路; 锁存器

flip-latch 双语例句

1. 1、 Through redesigning the structure of the original PFD circuit and based on the traditional D trigger PFD, two new PFDs, transmission gate D trigger PFD and flip-latch based PFD were proposed.
   通过对原有PFD电路结构进行重新设计，在传统D触发器PFD的基础上提出了两种新型PFD：传输门D触发器型PFD和基于锁存器的PFD。
2. 2、 Design of MUX and D flip-latch Using RT Devices
   基于RT器件的数据选择器和D锁存器设计
3. 3、 It transfers the data wi th t he flip-latch by ISA and with query by serial port.
   ISA总线上的数据传输主要通过数据锁存的方法，串口的数据传输主要采用查询的方法。
4. 4、 The structure of the dual modulus prescaler is optimized and a novel D-latch integrated with OR logic gate is used. Keyboard& display interface based on a 8D flip-latch
   改进了双模预分频器的结构，提出了一种新型集成或逻辑的SCL结构D锁存器.用一片8D锁存器实现的单片机键显接口电路
5. 5、 In this paper, the design of hardware adopts structure of "serial move+ flip-latch+ drive" and it presents its design thinking, which is followed program design of MCU and PC for the hardware.
   该LED汉字点阵显示屏的硬件电路采用了“串行移位+锁存+驱动”的结构，并给出了采用这种硬件结构的设计原理分析，然后对应整个硬件系统进行了单片机方和PC机方的程序设计。
6. 6、 It integrated flip-latch, coding unit, data bus, frequency division unit, logical compare unit, counter and logic circuit into a single CPLD chip, and dramatically decreased PCB's area and increased system reliability.
   在一片CPLD中集成了低位地址锁存、地址译码、数据总线、分频电路、比较、记数以及逻辑电路等。
7. 7、 The periphery circuit includes protect circuit, HV circuit, high voltage producing circuit, control circuit, decoding circuit, sensitively amplificatory circuit, eight bits flip-latch and eight bits shift register.
   外围电路包括：保护电路、HV电路、高压产生电路、控制电路、译码电路、灵敏放大电路、八位锁存器、八位移位寄存器等。
8. 8、 Several digital circuits are also used in the proposed DAC to implement such as flip-latch circuit, thermometer decoder, current select circuit, etc.
   设计了DAC的数字电路部分包括锁存器、温度计译码器、电流源状态逻辑选电路等。
9. 9、 Adding a 12 bits signal flip-latch to the input port so that the DAC can avoid the peak interference.
   在输入端加入了一个12位的数字信号锁存器，这样可以避免出现尖峰干扰。
10. 10、 Based on the complementary-coupling characteristic of ECL circuits and direct-comparativist ECL circuit, ECL ternary basic flip-latch were designed in switch level.
    在ECL电路的互补对偶特性和直接比较型ECL电路基础上，我们用开关级设计出了几种三值ECL基本触发器。
11. 11、 First, direct-comparativist ECL ternary D flip-latch with complementary-coupling structure was designed.
    首先设计出了三值ECL直接比较型D型锁存器。接着设计出了两种三值一次操作型触发器：一为三值主从存储型触发器，二为三值时钟竞争型触发器。
12. 12、 In this paper design of some circuit including in A/ D circuit is also analyzed, such as front analog circuit, sample clock circuit and data flip-latch circuit. Find out the fact reducing a high speed A/ D circuit performance.
    同时对高速转换器件及转换电路中包括前端模拟电路、采样时钟、后端数据锁存等辅助电路设计进行了分析。