gated clock

gated clock 基本解释

网络  门生时钟; 门控时钟; 门时钟; 有门控时钟; 钟技术

计算机

重点词汇

• clockn. 时钟, 计时器, (袜子上的)绣花边花 vt. 绣花样, 记时, 记录 vi. 记录时间 [计] 时钟
• gateda. 有关卡的；带栅门的

gated clock 双语例句

1. 1、 This flow could use the gated clock, the operand isolation and the gate level optimization to decrease the power consumption without changing the original design.
   这种综合流程在不改变原有电路设计的前提下同时采用了门控时钟、操作数隔离和门级功率优化来降低功耗。
2. 2、 Testability is affected by gated-clock, structure of the circuit has been ameliorated to avoid this effect.
   门控时钟的引入通常会影响电路的可测试性，针对该情况作者进一步改进了电路结构减少了门控时钟对可测试性的影响。
3. 3、 AHB bus controller to take top-down design, divided into arbitration, decoder, mux, register, gated clock signal modules.
   AHB总线控制器采取自顶向下的设计方法，分为仲裁器，译码器，选择器，寄存器，门控时钟信号产生等模块。
4. 4、 The delay is reduced by 27.3% in bypass with low-VT device. A variety of technologies are employed to reduce power dissipation, such as gated clock, multi-VT, reading in reverse, multi-level decoding, switching dynamic signals to static signals and so on.
   定向通路中使用了低阈值技术把延时降低了27.3%。采用门控时钟、多阈值技术、反相读出、多级译码、动静转换等技术降低功耗。